The present invention relates generally to ATM (Asynchronous Transfer Mode) communication networks and, more specifically, to a policing control apparatus for ATM communication networks.
ATM communications have been proposed to realize multiple media communications, high rate, broadband communications and other advanced and diversified communications. ATM communication networks handle traffic with various communication rates (i.e., rate characteristics) and time variations of the transmission data quantity (i.e., burst characteristics). In the light of traffic having such diversified characteristics, there is a demand for efficiently and economically managing channel bands (i.e., network resources) while maintaining required cell delay time sway and cell discarding factor (i.e., service quality). To meet this demand, traffic control techniques are important.
In the traffic control technology, in order to allow common use of network resources by multiple media communications, satisfy the service quality for each call and realize high rate cell transmission, traffic control for regulating the input to the network from the consideration of the accepting status of the network, is made without making cell transmission level flow control. As one type of traffic control, a policing control is used, which monitors the user's traffic status during the communication on the basis of a user's traffic declaration. More specifically, in a policing control, the transmitted cells are monitored, and those violating contract requirements or rules are regulated at the gate of the network.
In the ATM communication network, continuous transmission of a great number of cells to the network from a particular user interferes with fair utilization of the network. Besides, it is liable to disable smooth switching and transfer control within the network. Accordingly, the user is required to make a contract such that the user can effect transmission of a number of cells less than a predetermined limit in a predetermined time (i.e., cell time) for each virtual path identifier (VPI), which is set from the prescriptions for each terminal user or subscriber but that excess cells transmitted are discarded. The cell time and the permissible transmission cell number are usually set for each service class. The policing is an operation of monitoring the status of cell transmission at the network gate and discarding cells that are transmitted by violating the contract.
FIG. 3 shows a conventional policing circuit. When a cell is inputted to a cell input terminal, its VPI No. is supplied to a service class No. memory 1 and a data memory 2. The data memory 2 is, for example, of a logical multiplex FIFO type constructed as a single port memory and stores data at each designated address. In the service class No. memory 1 are stored service class No. information corresponding to VPI No. information. When the VPI No. of a cell is inputted to the memory 1 from the cell input terminal, a corresponding service class No. is read out and outputted. A write address generator 3 generates an address which is incremented by "1" in one cell time in response to a cell pulse clock, not shown, the generated address being supplied as a write address to a selector 4.
An upper limit value memory 9 has a storage of upper limit values of cell numbers for respective service classes corresponding to service class No. information in policing cycles. In response to a service class No. from the service class No. memory 1, a predetermined cell number upper limit value for the corresponding service class in a policing cycle is outputted from the upper limit value memory 9. The VPI No., service class No., etc. from the cell input terminal, are written in areas at the addresses designated by address information, which is output from the write address generator 3 and supplied through a selector 4 to an address terminal of the data memory 2. A counter 5 counts (n+1) (n being the number of service classes) times cell pulses, not shown, as clock and outputs all service class Nos. in one cell time. In an address No. memory 6 are stored specific values as policing cycles of individual service classes. These values are read out sequentially in every cell time under the control of the output of the counter 5, thus providing the policing cycles of all the service classes. A subtractor 7 subtracts the address No. value output of the address No. memory 6 from the write address output of the write address generator 3 and supplies the difference as a read address to the selector 4.
The writing of the VPI No. and service class No. in the data memory 2 is made in the write addresses designated by the address information supplied through the selector 4. In one cell time, the writing is made once, while the reading is made a number of times corresponding to the number of service classes. Data including VPI Nos. and service class Nos. stored in the area at addresses designated by the information fed to the address terminal of the data memory 2, is read out from the data memory 2. The selector 4 switches the addresses in write and read times in one cell time. A logic processing unit 8 controls the operation of a count memory 10 and a cell regulation unit 11 according to upper limit values from the upper limit value memory 9, the VPI No. from the cell input terminal, count value from the counter 5 corresponding to service class No., VPI No. and service class No. from the data memory 2 and VPI from the cell input terminal.
In the count memory 10 is stored count values of cells identified by VPI Nos. Whenever the VPI value is read out from the data memory 2, the logic processing unit 8 decrements the count value of the pertinent VPI cells in the count memory 10. Also, whenever a VPI value is written in the data memory 2, the logic processing unit 8 increments the pertinent VPI cell count value in the count memory 10. For the count memory 10 used are the VPIs as the address information and the count values as the data, and the incrementing and decrementing is controlled by reading out the pertinent VPI cell in the count memory 10, the count value being stored again in the count memory 10. When writing in the data memory 2 is made and the count value in the count memory 10 is incremented, the upper limit value for the pertinent VPI is read out, and the incremented count value and the read-out upper limit value are compared in the logic processing unit 8.
If the incremented count value exceeds the upper limit value of the upper limit value memory 9, the logic processing unit 8 determines the pertinent input cell is one which is violating the contract. Thus, regulation of the cells such as discarding thereof is realized by outputting a discarding signal to the cell regulation unit 11.
In the above policing circuit, if the stored cell count value data are destroyed due to a problem or tentative abnormal operation in the count memory 10 storing the count values corresponding to the VPI service classes or in an access circuit for the count memory circuit 10, the abnormality can not be detected. Unless it is possible to detect and cope with generated abnormality in the event of destruction of the content of the count memory, that abnormality of policing due to the count memory content destruction remains permanently. That is, policing processing based on the abnormal count values will be executed and lead to the discarding of even proper cells, thus extremely spoiling service quality.